Timing Jitter and Quantization Error Effects on the performance of Sigma Delta ADC used in SDR Receivers
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چکیده
Timing Jitter and Quantization Error Effects on the performance of Sigma Delta ADC used in SDR Receivers Preeti Trivedi, Dr. Ajay Verma 1 Assistant Professor, SGSITS, Indore, Madhya Pradesh, INDIA 2 Prof. and Head, IET, DAVV, Indore, Madhya Pradesh, INDIA __________________________________________________________________________________________ Abstract: This paper presents the effect of timing jitters on the performance of sigma delta ADC for SDR mobile receivers. The time-varying behavior is caused by the non-stationary nature of the clock jitter process. Jitter is the limiting effect for high speed analog to digital converter with high resolution and wide digitization bandwidth, which are required in receivers in order to support high data rates. Mathematical modeling has been done for the same to show the effect of clock jitter as well as aperture jitter on the performance of Sigma delta ADC for SDR mobile receivers in terms SNR. The present work shows that there is degradation in the system performance due to timing jitters. It is also shown that when clock jitter becomes more dominant, increasing the OSR does not improve the performance of Sigma Delta ADC. SNR with quantization error (SQNR) has been evaluated using second order sigma delta ADC. It is shown that at 256 OSR the SQNR is 118.9dB which is very close to the calculated theoretical value. Simulation has been done using SD toolbox of MATLAB Simulink.
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